发明名称 Method for fabricating interconnecting lines inside via holes of semiconductor device
摘要 A method for fabricating interconnecting lines inside via holes of a semiconductor device comprises steps of providing a template having a receiving trench and a connection surface both on the same side of the template; filling an electric-conduction material into the receiving trench; connecting a substrate having at least one via hole with the connection surface to interconnect the via hole with the receiving trench; heating the electric-conduction material to a working temperature to liquefy a portion of the electric-conduction material and make it flows from the receiving trench into the via hole; and cooling the electric-conduction material to form an interconnecting line inside the via hole. The present invention fabricates interconnecting lines by a heat-forming method, which features simple steps and has advantages of shorter fabrication time, lower fabrication complexity, higher fabrication efficiency, higher yield and lower fabrication cost.
申请公布号 US8679974(B2) 申请公布日期 2014.03.25
申请号 US201213416627 申请日期 2012.03.09
申请人 FANG WEI-LEUN;LIN CHIA HAN;LEE FENG YU;NATIONAL TSING HUA UNIVERSITY 发明人 FANG WEI-LEUN;LIN CHIA HAN;LEE FENG YU
分类号 H01L21/44 主分类号 H01L21/44
代理机构 代理人
主权项
地址