发明名称 SEMICONDUCTOR DEVICE LAYOUT REDUCING IMBALANCE IN CHARACTERISTICS OF PAIRED TRANSISTORS
摘要 In a semiconductor device having paired transistors, an imbalance in characteristics of the paired transistors is reduced or prevented while an increase in circuit area is reduced or prevented. First and second transistors have first and second regions having the same active region pattern, and third and fourth transistors have third and fourth regions having the same active region pattern. The active regions of the third and fourth transistors have a longer length in the channel length direction than that of the active regions of the first and second transistors. The third and fourth regions have a narrower width in the channel length direction than that of the first and second regions.
申请公布号 US2014077306(A1) 申请公布日期 2014.03.20
申请号 US201314048885 申请日期 2013.10.08
申请人 PANASONIC CORPORATION 发明人 ISHIZU TOMOYUKI
分类号 H01L27/088 主分类号 H01L27/088
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