发明名称 CONTROL CIRCUIT OF SRAM AND OPERATING METHOD THEREOF
摘要 A control circuit of SRAM and an operating method thereof are provided. The control circuit includes a memory array, a word-line driver, a boost circuit and a voltage level detecting circuit. The memory array includes a plurality of memory cells. Each memory cell includes a plurality of transistors. The word-line driver is to activate the word-line of the memory array for cell storage data access. The boost circuit is to provide the higher voltage source for the word-line driver and a first operating voltage for boosting the first operating voltage to a second operating voltage. The voltage level detecting circuit is detecting if the first operation voltage needed boosted with boost-operation and a detecting-trigger signal and controls the operating of the boost circuit based on the detecting-trigger signal, the first operating voltage and a predetermined voltage.
申请公布号 US2014063918(A1) 申请公布日期 2014.03.06
申请号 US201313738111 申请日期 2013.01.10
申请人 NATIONAL CHIAO TUNG UNIVERSITY 发明人 CHUANG CHING-TE;LIEN NAN-CHUN;LIAO WEI-NAN;CHU LI-WEI;CHANG CHI-SHIN;TU MING-HSIEN
分类号 G11C11/412 主分类号 G11C11/412
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