发明名称 ELECTRONIC APPARATUS INCLUDING SHALLOW TRENCH ISOLATION (STI) REGION HAVING BOTTOM NITRIDE LINER AND TOP OXIDE LINER, AND ASSOCIATED METHOD
摘要 PROBLEM TO BE SOLVED: To provide an electronic apparatus capable of improving interface properties between a shallow trench isolation (STI) region and a corresponding semiconductor device, and a method for manufacturing the same.SOLUTION: An electronic apparatus can comprise a substrate, a buried type oxide (BOX) layer on the substrate, at least one of semiconductor device on the BOX layer, and at least one of STI region adjacent to at least one of semiconductor device and in the substrate. At least one of STI region can comprise a nitride layer defining a sidewall surface of the substrate and lining a bottom part of the sidewall surface, an oxide layer lining an upper part of the sidewall surface above the bottom part, and an insulating material in the nitride layer and the oxide layer.
申请公布号 JP2014042020(A) 申请公布日期 2014.03.06
申请号 JP20130164180 申请日期 2013.08.07
申请人 ST MICROELECTRON INC 发明人 LIU QING;NICOLAS LOUBET;PRASANNA KHARE
分类号 H01L21/762;H01L21/336;H01L21/76;H01L27/12;H01L29/786 主分类号 H01L21/762
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