发明名称 |
CIRCUITRY AND METHOD FOR REDUCING AREA AND POWER OF A PIPELINE ADC |
摘要 |
<p>A pipeline ADC (analog-to-digital converter) (14) includes a residue amplifier (7) for applying a first residue signal (Vresl) to a first input of a residue amplifier (11A) and to an input of a sub-ADC (8) for resolving a predetermined number (m) of bits and producing a redundancy bit in response to the first residue signal. A level-shifting MDAC (9 A) converts the predetermined number of bits and the redundancy bit to an analog signal (10) on the a second input of the residue amplifier, which amplifies the difference between the first residue signal and the analog signal to generate a second residue signal (Vres2). The MDAC causes the residue amplifier to shift the second residue signal back within a predetermined voltage range (±Vref/2) by the end of the amplifying if the second residue signal is outside of the predetermined voltage range.</p> |
申请公布号 |
WO2014036550(A1) |
申请公布日期 |
2014.03.06 |
申请号 |
WO2013US57811 |
申请日期 |
2013.09.03 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED;TEXAS INSTRUMENTS JAPAN LIMITED |
发明人 |
NANDI, GAUTAM S.;KHURANA, RISHUBH |
分类号 |
H03M1/12 |
主分类号 |
H03M1/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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