发明名称 |
ENHANCED FINFET PROCESS OVERLAY MARK |
摘要 |
An overlay mark suitable for use in manufacturing nonplanar circuit devices and a method for forming the overlay mark are disclosed. An exemplary embodiment includes receiving a substrate having an active device region and an overlay region. One or more dielectric layers and a hard mask are formed on the substrate. The hard mask is patterned to form a hard mask layer feature configured to define an overlay mark fin. Spacers are formed on the patterned hard mask layer. The spacers further define the overlay mark fin and an active device fin. The overlay mark fin is cut to form a fin line-end used to define a reference location for overlay metrology. The dielectric layers and the substrate are etched to further define the overlay mark fin. |
申请公布号 |
US2014065832(A1) |
申请公布日期 |
2014.03.06 |
申请号 |
US201213602697 |
申请日期 |
2012.09.04 |
申请人 |
HSIEH CHI-WEN;CHANG CHI-KANG;LIU CHIA-CHU;CHEN MENG-WEI;CHEN KUEI-SHUN;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
HSIEH CHI-WEN;CHANG CHI-KANG;LIU CHIA-CHU;CHEN MENG-WEI;CHEN KUEI-SHUN |
分类号 |
H01L21/308;H01L23/544 |
主分类号 |
H01L21/308 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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