| 摘要 |
A circuit for providing signal amplification with reduced fixed pattern noise. In an embodiment, the circuit includes an amplifier and a plurality of legs coupled in parallel with one another between a first node for an input of the amplifier and a second node for an output of the amplifier. Control logic selects a first combination of the plurality of legs for a first configuration of the circuit to provide a first loop gain with the amplifier. In another embodiment, the control logic further selects a second combination of the plurality of legs for a second configuration of the circuit to provide a second loop gain with the amplifier, wherein the first loop gain is substantially equal to the second loop gain. |
