| 摘要 |
Provided is a semiconductor device (SCD) that has first and second access gates (AG1, AG2), first and second driver gates (DG1, DG2), and first and second load gates (LG1, LG2), all extending in the same direction in a planar layout. A first direction (D1) from one of a pair of first source/drains (SD1) towards the other and a second direction (D2) from one of a pair of second source/drains (SD2) towards the other are the same in the planar layout. The first directions (D1) for each of at least two SRAM memory cells (MC1, MC2) are the same direction and the second directions (D2) for each are also the same direction. As a result, a semiconductor device (SCD) with improved cell characteristics can be achieved by the reduction in SRAM variation. |
