发明名称 |
SYNCHRONIZING A TRANSLATION LOOKASIDE BUFFER WITH AN EXTENDED PAGING TABLE |
摘要 |
A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system. |
申请公布号 |
US2014059320(A1) |
申请公布日期 |
2014.02.27 |
申请号 |
US201314070561 |
申请日期 |
2013.11.03 |
申请人 |
BENNETT STEVEN M.;ANDERSON ANDREW V.;NEIGER GILBERT;UHLIG RICHARD;RODGERS DION;SANKARAN RAJESH M.;RUST CAMRON;SCHOENBERG SEBASTIAN |
发明人 |
BENNETT STEVEN M.;ANDERSON ANDREW V.;NEIGER GILBERT;UHLIG RICHARD;RODGERS DION;SANKARAN RAJESH M.;RUST CAMRON;SCHOENBERG SEBASTIAN |
分类号 |
G06F12/10 |
主分类号 |
G06F12/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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