| 摘要 |
A "multiple return-to-zero" (MRZ) current switching DAC. In operation, the outputs of respective current sources are selectively directed to respective intermediate nodes in response to respective control signals which vary with a digital input word, and in synchronization with a clock CK1. A plurality of MRZ current switches are connected between respective intermediate nodes and the DAC's analog output. The MRZ switches are driven with a clock CK2 which toggles in synchronization with CK1 at a frequency fCK2=N*fCK1. The MRZ switches are operated such that switching noise that arises when CK1 is asserted is prevented from appearing on the analog output. When properly arranged, the DAC can generate a direct digital waveform at RF frequencies, with N chosen to produce an output spectrum such that the DAC's output power is relatively high within the desired frequency range. |
