| 摘要 |
PROBLEM TO BE SOLVED: To provide a method and system for providing a clock signal with less power.SOLUTION: A method and system called a hybrid clock system is provided, which provides a clock signal with less power consumption. The hybrid clock system uses a PLL for high-speed data transfer but is provided with a power-saving mode for transferring data with less power consumption. In a normal mode, the hybrid clock system includes a reference clock running at a low frequency for driving the PLL. The PLL multiplies the reference clock frequency to a much higher frequency and supplies the frequency-multiplied reference clock to a transfer circuit. In the power saving mode, the hybrid clock system turns the PLL off and connects the reference clock directly to the data transfer circuit. |
