| 摘要 |
The component i.e. microcontroller (100), has a processor (120) tripped by a signal (SIG-INT) generated by an internal clock (170) using a generator (171). A counter (160) counts the number of cycles of a signal (SIG-EXT) generated by an external clock (270), based on the instruction of the processor. The processor generates the contingency from the number of cycles of the signal generated by the external clock. An independent claim is also included for a chip card comprising a unit for executing a loop whose iteration number is obtained from contingency. |
