发明名称 |
DRAM STRUCTURE WITH BURIED WORD LINES AND FABRICATION THEREOF, AND IC STRUCTURE AND FABRICATION THEREOF |
摘要 |
A DRAM structure with buried word lines is described, including a semiconductor substrate, cell word lines buried in the substrate and separated from the same by a first gate dielectric layer, and isolation word lines buried in the substrate and separated from the same by a second gate dielectric layer. The top surfaces of the cell word lines and those of the isolation word lines are lower than the top surface of the substrate. The bottom surfaces of the isolation word lines are lower than those of the cell word lines. |
申请公布号 |
US2014042548(A1) |
申请公布日期 |
2014.02.13 |
申请号 |
US201314047018 |
申请日期 |
2013.10.07 |
申请人 |
NANYA TECHNOLOGY CORPORATION |
发明人 |
LIU HAO-CHIEH;HEINECK LARS;CHIANG PING-CHIEH |
分类号 |
H01L27/108 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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