发明名称 MEMORY UNIT
摘要 PROBLEM TO BE SOLVED: To provide a memory unit enabling high speed operation and preventing a circuit area from increasing.SOLUTION: A memory unit 1 includes: a memory cell array 300 having a plurality of memory cells 301; a common source line 115 to which each source of the plurality of memory cells 301 is commonly connected; and a second electrical connection path for further connecting between the common source line 115 and ground potential by erasure state memory cells 302 when the common source line 115 forms a first electrical connection path to be connected to the ground potential.
申请公布号 JP2014029745(A) 申请公布日期 2014.02.13
申请号 JP20120169549 申请日期 2012.07.31
申请人 RENESAS ELECTRONICS CORP 发明人 TAKESHITA TOSHIAKI
分类号 G11C16/06;H01L21/336;H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C16/06
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