发明名称 SYSTEM AND METHOD TO PERFORM SCAN TESTING USING A PULSE LATCH WITH A BLOCKING GATE
摘要 A system and method to perform scan testing using a pulse latch with a blocking gate is disclosed. In a particular embodiment, a scan latch includes a pulse latch operable to receive data while a pulse clock signal has a first logical clock value and a blocking gate coupled to an output of the pulse latch. The blocking gate is operable to propagate the data from the output of the pulse latch while the pulse clock signal has a second logical clock value.
申请公布号 US2014035645(A1) 申请公布日期 2014.02.06
申请号 US201213564254 申请日期 2012.08.01
申请人 NARAYANAN VENKATASUBRAMANIAN;BELLUR KASHYAP R.;QUALCOMM INCORPORATED 发明人 NARAYANAN VENKATASUBRAMANIAN;BELLUR KASHYAP R.
分类号 H03K3/356;G06F17/50 主分类号 H03K3/356
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