发明名称 WIRING BOARD
摘要 PROBLEM TO BE SOLVED: To provide a wiring board which does not cause a significant misalignment between conductor patterns on a top face and an undersurface of the wiring board and enables mounting of a semiconductor element on an exact position with respect to an external electric circuit board.SOLUTION: In a wiring board 10, a multilayer wiring structure is formed by stacking a plurality of layer units C0, T1-T5, B1-B5 in each of which through conductors 2 composed of a conductor paste are filled in a plurality of through holes formed in an insulation layer 1 and a conductor pattern 3 is embedded by transfer on a surface of the insulation layer 1 so as to cover the through conductors 2, in a vertical direction in a multi-layered fashion, and connecting the through conductors 2 and the conductor patterns 3 in the upper and lower layer units. And in the wiring board 10 where there is stack misalignment in the through conductor 2 and the conductor patterns 3 between the upper and lower layer units, the layer units C0, T1-T5, B1-B5 are stacked in such a manner that orientations of the stack misalignment on a top surface side and an undersurface side become symmetric across a central part of the multilayer wiring structure in a thickness direction.
申请公布号 JP2014027188(A) 申请公布日期 2014.02.06
申请号 JP20120167839 申请日期 2012.07.28
申请人 KYOCER SLC TECHNOLOGIES CORP 发明人 MATSUOKA TAKAHIRO
分类号 H05K3/46;H01L23/12;H05K3/20;H05K3/40 主分类号 H05K3/46
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