发明名称 PROCESSOR AND INSTRUCTION PROCESSING METHOD THEREOF
摘要 <p>Provided are a processor and an instruction processing method of the processor, with which it is possible to increase an instruction execution rate. A processor 1 includes a BTAC 12 that stores branch target information of a branch instruction and boundary information indicating that the branch instruction is on a fetch line boundary, a branch prediction unit 13 that performs branch prediction of a variable-length instruction set including the branch instruction by referring to the BTAC 12, and a fetch unit 14 that fetches an instruction based on the branch prediction result. The branch prediction unit 13 refers to the BTAC 12, and when the boundary information is present in the instruction which the branch prediction unit 13 makes the fetch unit 14 fetch, the branch prediction unit 13 makes the fetch unit 14 fetch the following next fetch line as well and then makes the fetch unit 14 fetch a branch prediction target instruction according to the branch target information.</p>
申请公布号 EP2693333(A1) 申请公布日期 2014.02.05
申请号 EP20120765299 申请日期 2012.02.24
申请人 RENESAS ELECTRONICS CORPORATION 发明人 NAGAO, TSUYOSHI;SATO, JUNICHI
分类号 G06F9/38;G06F9/30;G06F12/08 主分类号 G06F9/38
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