发明名称 Low Stress Package For an Integrated Circuit
摘要 A package that electrically connects an integrated circuit to a printed circuit board includes a frame and a package body that encases a portion of the frame and the integrated circuit. The frame includes a mounting region that is connected to the printed circuit board, and a cantilevering region that cantilevers away from the mounting region. The cantilevering region retains the integrated circuit in a flexible fashion.
申请公布号 US2014027890(A1) 申请公布日期 2014.01.30
申请号 US201313952587 申请日期 2013.07.27
申请人 INTEGRATED DEVICE TECHNOLOGY INC. 发明人 GHAI AJAY K.
分类号 H01L23/00 主分类号 H01L23/00
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