| 摘要 |
A semiconductor chip capable of realizing reduction in cost when the semiconductor chip is mounted over a package substrate, miniaturization of the package substrate, and optimization of an interconnect pattern. The semiconductor chip includes a first electrode pad group provided in the semiconductor chip, and comprised of at least one electrode pad, and a second electrode pad group provided in the semiconductor chip, and comprised of at least one other electrode pad capable of outputting a signal identical to a signal outputted by the one electrode pad. Further, either the one electrode pad of the first electrode pad group, or the one other electrode pad of the second electrode pad group, closer in distance to one other electrode pad of one other semiconductor chip is coupled to the one other electrode pad of the one other semiconductor chip. |
