Asymmetric hetero-structure FET and method of manufacture

摘要

An asymmetric hetero-structure FET and method of manufacture is provided. The structure includes a semiconductor substrate and an epitaxially grown semiconductor layer on the semiconductor substrate. The epitaxially grown semiconductor layer includes an alloy having a band structure and thickness that confines inversion carriers in a channel region, and a thicker portion extending deeper into the semiconductor structure at a doped edge to avoid confinement of the inversion carriers at the doped edge.