| 摘要 |
<p>In a method of manufacturing a transistor, a first recess is formed on the upper part of a substrate. A first gate insulating pattern is formed on the sidewall of a first recess. A second recess connected to the first recess is formed on the substrate. A second gate insulating pattern is formed on the inner wall of the second recess. A gate electrode is formed in the rest of the first and the second recess. A first and a second impurity region are formed in a part of the substrate adjacent of the gate electrode. At this time, a first gate insulating layer pattern has a thicker thickness compared to a second gate insulating layer pattern. A GIDL phenomenon is reduced in the transistor.</p> |
