发明名称 Packaging method for electronic components using a thin substrate
摘要 Disclosed is a package method for electronic components by a thin substrate, comprising: providing a carrier (200); forming at least one metal layer (202, 206) and at least one dielectric layer (204) on the carrier for manufacturing the thin substrate, and the thin substrate comprises at least one package unit for connecting at least one chip; forming at least one pad layer (210) on a surface of the thin substrate; parting the thin substrate from the carrier; performing test to the thin substrate to weed out the package unit with defects in the at least one package unit and select the package units for connecting the chips; connecting the chips with the selected package units by flip chip bonding respectively. Accordingly, the yield of the entire package process can be improved and the pointless manufacture material cost can be reduced.
申请公布号 EP2610905(A3) 申请公布日期 2014.01.22
申请号 EP20120195729 申请日期 2012.12.05
申请人 PRINCO CORP. 发明人 GUU, YEONG-YAN;SHIH, YING-JER
分类号 H01L21/683;H01L21/48;H01L21/56;H01L21/60;H01L21/66;H01L23/31;H01L23/498 主分类号 H01L21/683
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