| 摘要 |
A semiconductor receiver device using clock embedded source-synchronous signaling and a semiconductor system comprising the same are disclosed. A semiconductor device according to an embodiment of the present invention comprises: a differential equalizer for amplifying the high-frequency band of differential coupled signals which are generated by coupling differential data signals and a single clock signal and transmitted from a transmission end; a differential data restoration unit for restoring differential data from the difference between the differential coupled signals of which the high-frequency band is amplified; a differential clock restoration unit for restoring a signal clock from the sum of the differential coupled signals of which the high-frequency band is amplified, converting the restored single clock into a differential clock and outputting the differential clock to a data sampling unit; a delay circuit unit for compensating for the phase difference between the restored differential data and differential clock to secure an ideal sampling margin; and a data sampling unit for restoring data from the differential data and the differential clock by sampling. [Reference numerals] (1100) Data providing unit; (1200) Multi-phase clock generator; (1300) Data driving unit; (1400) Clock driving unit; (1500) Signal coupling unit; (2050) Equalizer; (2100) Differential data restoration unit; (2200) Differential clock restoration unit; (2300) Data sampling unit |
