| 摘要 |
<p>Batch assembly methods for high density packaging of power semiconductor chips (32) in hermetic thin packaging include providing silicon chip arrays with thermocompressively bonded foil contacts (38), preparing ceramic lid arrays (10) which contain upper surface and lower margin direct-bonded copper coverings (18) and through-the-lid high current spherical conductors (16), coining Cu/Mo/Cu or copper cup arrays (44), die mounting within each respective cup a respective semiconductor chip (32), superpositionally registering a lid array (10) with a strip form of cup array, and solder (21) reflowing to hermetically seal as hermetic thin packaging within a registered set of cup (44) and lid arrays (10).</p> |
