发明名称 |
Semiconductor memory device and method of controlling the same |
摘要 |
A method of tuning a phase of a clock signal includes performing data training on a plurality of data pins through which data are input and output, in synchronization with a data clock signal; determining one of the data pins to be a representative pin; performing clock and data recovery (CDR) on read data of the representative pin; and adjusting a phase of the data clock signal based on the CDR. |
申请公布号 |
US8631266(B2) |
申请公布日期 |
2014.01.14 |
申请号 |
US201113050277 |
申请日期 |
2011.03.17 |
申请人 |
SEOL HO-SEOK;SOHN YOUNG-SOO;KIM DONG-MIN;PARK KWANG-IL;BAE SEUNG-JUN;SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SEOL HO-SEOK;SOHN YOUNG-SOO;KIM DONG-MIN;PARK KWANG-IL;BAE SEUNG-JUN |
分类号 |
H04L7/04 |
主分类号 |
H04L7/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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