发明名称 |
SYSTEMS, APPARATUSES, AND METHODS FOR PERFORMING A HORIZONTAL ADD OR SUBTRACT IN RESPONSE TO A SINGLE INSTRUCTION |
摘要 |
Embodiments of systems, apparatuses, and methods for performing in a computer processor vector packed horizontal add or subtract of packed data elements in response to a single vector packed horizontal add or subtract instruction that includes a destination vector register operand, a source vector register operand, and an opcode are describes. |
申请公布号 |
US2014013075(A1) |
申请公布日期 |
2014.01.09 |
申请号 |
US201113992230 |
申请日期 |
2011.12.23 |
申请人 |
HAGOG MOSTAFA;OULD-AUMED-VALL ELMOUSTAPHA;VALENTINE ROBERT;GRADSTEIN AMIT;RUBANOVICH SIMON;SPERBER ZEEV |
发明人 |
HAGOG MOSTAFA;OULD-AUMED-VALL ELMOUSTAPHA;VALENTINE ROBERT;GRADSTEIN AMIT;RUBANOVICH SIMON;SPERBER ZEEV |
分类号 |
G06F9/30 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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