发明名称 |
VECTOR MULTIPLICATION WITH OPERAND BASE SYSTEM CONVERSION AND RE-CONVERSION |
摘要 |
A method is described that includes performing the following with an instruction execution pipeline of a semiconductor chip. Multiplying two vectors by: receiving a vector element multiplicand and vector element multiplier expressed in a first base system; converting the vector element multiplicand and vector element multiplier into a second lower base system to form a converted vector element multiplicand and a converted vector element multiplier; multiplying with a first execution unit of the pipeline the converted vector element multiplicand and the converted vector element multiplier to form a multiplication result; accumulating in a register a portion of the multiplication result with a portion of a result of a prior multiplication of operands expressed in the second lower base system; and, converting contents of the register into the first base system. |
申请公布号 |
WO2014004394(A1) |
申请公布日期 |
2014.01.03 |
申请号 |
WO2013US47378 |
申请日期 |
2013.06.24 |
申请人 |
INTEL CORPORATION |
发明人 |
GUERON, SHAY;KRASNOV, VLAD |
分类号 |
G06F9/06;G06F9/30;G06F9/38 |
主分类号 |
G06F9/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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