发明名称 MANUFACTURING METHOD OF ARRAY SUBSTRATE VIA HOLES AND MANUFACTURING METHOD OF ARRAY SUBSTRATE
摘要 <p>The invention discloses a manufacturing method of array substrate via holes, the manufacturing method comprising the following steps: step of pre-etching: respectively carrying out partial etching on a hierarchical structure above a metal layer corresponding to at least one of the regions in need of generating via holes, so that the corresponding metal layers in the regions in need of generating via holes have the same etching depth allowance; and step of etching: synchronously etching the regions in need of generating via holes until all the via holes reached the corresponding metal layers. In the manufacturing method of array substrate via holes disclosed by the invention, the regions with different etching depths are etched in different steps; after the pre-etching step, the via holes have the same etching depth allowance; and after the etching step, all the via holes are synchronously etched, so that all the via holes simultaneously reached the corresponding metal layers, thereby lowering the over-etching defectiveness generated at the via holes with shallower etching depth, and enhancing the product yield.</p>
申请公布号 WO2014000361(A1) 申请公布日期 2014.01.03
申请号 WO2012CN84244 申请日期 2012.11.07
申请人 BOE TECHNOLOGY GROUP CO., LTD.;BEIJING BOE DISPLAY TECHNOLOGY CO., LTD. 发明人 FENG, BIN;BAI, JINCHAO
分类号 H01L21/311;H01L21/768 主分类号 H01L21/311
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