| 摘要 |
An integrated circuit chip includes a plurality of test input pads configured to receive a plurality of test input signals, a plurality of single-ended type buffers configured to receive signals input to the plurality of test input pads in a connectivity test mode, a plurality of differential-type buffers configured to receive signals input to the plurality of test input pads in a normal mode, a signal combination unit configured to combine the plurality of test input signals input through the plurality of single-ended type buffers, and to generate a plurality of test output signals, and a plurality of test output pads configured to output the plurality of test output signals in the connectivity test mode. |
