| 摘要 |
A phase locked loop circuit which obtains an output signal coincident in frequency and phase with a target signal which is acquired by multiplying the frequency of a reference signal by a ratio represented by the sum of a first fraction and a second fraction, the circuit includes a controlled oscillator including the same number of stages of annularly connected amplifiers as a number which is obtained by dividing, by 2, a least common multiple of a denominator of the first fraction, a denominator of the second fraction and 2, the same number of multiphase signals as the least common multiple being extractable from the controlled oscillator, the frequency of the multiphase signals being controlled by a digital control signal and an analog control signal, one of the multiphase signals being output as the output signal. |
