发明名称 SINGLE INSTRUCTION MULTIPLE DATA (SIMD) RECONFIGURABLE VECTOR REGISTER FILE AND PERMUTATION UNIT
摘要 An apparatus may comprise a register file and a permutation unit coupled to the register file. The register file may have a plurality of register banks and an input to receive a selection signal. The selection signal may select one or more unit widths of a register bank as a data element boundary for read or write operations.
申请公布号 US2013339649(A1) 申请公布日期 2013.12.19
申请号 US201213524454 申请日期 2012.06.15
申请人 HSU STEVEN K.;AGARWAL AMIT;KRISHNAMURTHY RAM K.;INTEL CORPORATION 发明人 HSU STEVEN K.;AGARWAL AMIT;KRISHNAMURTHY RAM K.
分类号 G06F12/00 主分类号 G06F12/00
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