发明名称 Semiconductor device including latency counter
摘要 For example, a semiconductor device includes a first latency counter, which selects whether to give an odd-cycle latency to an internal command signal; and a second latency counter, which gives a latency to an internal command signal at intervals of two cycles. The latency counters are connected in series. Since the number of bits in control information, which is used to set a latency, is smaller than the types of settable latency as a result, it is possible to reduce wiring density.
申请公布号 US8611177(B2) 申请公布日期 2013.12.17
申请号 US201113317598 申请日期 2011.10.24
申请人 FUJISAWA HIROKI;ELPIDA MEMORY, INC. 发明人 FUJISAWA HIROKI
分类号 G11C8/18 主分类号 G11C8/18
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