| 摘要 |
Imaging devices may include an array of image pixels arranged in rows and columns coupled to processing circuitry. The processing circuitry may include histogram generation circuitry and extremum pixel value identification circuitry. The histogram generation circuitry may include sub-histogram generation circuitry that generates pixel value sub-histograms each of which includes pixel values generated by pixels from respective subsets of the rows in the array. Histogram accumulation circuitry may combine the sub-histograms to generate an accumulated histogram. The extremum identification circuitry may process a set of pixel value patches. The identification circuitry may include a first stage of comparator circuitry for identifying an extremum value of each column in the set of patches, a second stage of comparator circuitry for identifying an extremum value of each patch in the set, and a third stage of comparator circuitry for identifying an extremum of the set of pixel value patches. |
