| 摘要 |
The present invention relates to a semiconductor device and a manufacturing method thereof capable of reducing parasitic capacitance between a storage node contact plug and a bit line. It includes a step of forming a plurality of bit line structures on a substrate, a step of forming a plurality of spacer films including a capping film in the bit line structures, a step of exposing a surface of the substrate by selectively etching the spacer films, a step of forming a capping spacer capping an air gap and the top of the air gap by etching the capping film, a step of forming an air gap bottom capping film capping the bottom of the air gap, and a step of forming a storage node contact plug between the bit line structures including the air gap bottom capping film. The invention forms the capping spacer capping the air gap in a self-alignment type by forming the air gap by removing a part of the capping spacer from a bottom side wall of the bit line. Therefore, there is not the need for additionally forming the capping film for capping the top of the air gap. |
