发明名称 |
Vertical Power MOSFET and Methods for Forming the Same |
摘要 |
A device includes a semiconductor region in a semiconductor chip, a gate dielectric layer over the semiconductor region, and a gate electrode over the gate dielectric. A drain region is disposed at a top surface of the semiconductor region and adjacent to the gate electrode. A gate spacer is on a sidewall of the gate electrode. A dielectric layer is disposed over the gate electrode and the gate spacer. A conductive field plate is over the dielectric layer, wherein the conductive field plate has a portion on a drain side of the gate electrode. A deep metal via is disposed in the semiconductor region. A source electrode is underlying the semiconductor region, wherein the source electrode is electrically shorted to the conductive field plate through the deep metal via. |
申请公布号 |
US2013320431(A1) |
申请公布日期 |
2013.12.05 |
申请号 |
US201213486768 |
申请日期 |
2012.06.01 |
申请人 |
SU PO-CHIH;CHOU HSUEH-LIANG;LIU RUEY-HSIN;NG CHUN-WAI;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
SU PO-CHIH;CHOU HSUEH-LIANG;LIU RUEY-HSIN;NG CHUN-WAI |
分类号 |
H01L29/78;H01L21/336 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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