发明名称
摘要 A test apparatus for testing a memory device including a memory cell. The test apparatus includes a storage and a controller. The storage stores a first value. The controller executes, at a given timing, determining a second value which is a threshold limit value to read data of the memory cell correctly on the basis of an output of the memory cell, calculating a difference between the first value and the second value, outputting a deterioration information on the basis of the difference between the first value and the second value, and updating the first value stored in the storage to the second value.
申请公布号 JP5359570(B2) 申请公布日期 2013.12.04
申请号 JP20090134345 申请日期 2009.06.03
申请人 发明人
分类号 G11C29/56;G06F12/16;G11C29/12;G11C29/50 主分类号 G11C29/56
代理机构 代理人
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