发明名称 Arbitration device, arbitration system, arbitration method, semiconductor integrated circuit, and image processing device
摘要 Provided is a hierarchical arbitration device wherein an arbitration device at each level of the hierarchy selects a resource use request having the highest priority and a resource use request having the second highest priority, outputting these two resource use requests to the arbitration device that is one level higher. After outputting the memory use request having the highest priority to a resource control unit as the top priority resource use request, when the arbitration device at the highest level of the hierarchy receives a signal from the memory control unit indicating receipt of the resource use request, the arbitration device then selects the resource use request having the second highest priority and outputs this resource request as the next top priority resource use request.
申请公布号 US8601192(B2) 申请公布日期 2013.12.03
申请号 US201013057019 申请日期 2010.06.04
申请人 MORIMOTO TAKASHI;WATANABE YOSHIHARU;YAMADA TAKASHI;HASHIMOTO TAKASHI;ASAI KOJI;PANASONIC CORPORATION 发明人 MORIMOTO TAKASHI;WATANABE YOSHIHARU;YAMADA TAKASHI;HASHIMOTO TAKASHI;ASAI KOJI
分类号 G06F12/00;G06F13/14 主分类号 G06F12/00
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