发明名称 VOLTAGE GENERATION CIRCUIT
摘要 <p>A voltage generating circuit comprises: N number of sets of boosting circuits which are configured to initiate a boosting operation for increasing the absolute value of output voltage, and which are configured to stop the boosting operation when reaching boosting voltage which is independently set to each boosting circuit; and a control circuit which is configured to operate the N number of sets of boosting circuits according to a priority as restricting the maximum number of simultaneously operating boosting circuits, among the N number of sets of boosting circuits, to a smaller number than the the number of N sets. [Reference numerals] (10) Minus voltage boosting circuit;(11) Reference electric phase generating circuit 2;(20) Plus voltage boosting circuit;(21,31) Reference electric phase generating circuit 1;(22,36,12) Detection circuit;(30) Pressure lowering circuit;(32) Reference electric phase conversion circuit;(35) Return pressure lowering circuit;(71) Voltage generating circuit;(90) Mobile control circuit;(92) Interrupt control circuit</p>
申请公布号 KR20130129862(A) 申请公布日期 2013.11.29
申请号 KR20130057109 申请日期 2013.05.21
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 SATO TAKAHIKO
分类号 G11C11/4074 主分类号 G11C11/4074
代理机构 代理人
主权项
地址