发明名称 |
SIGNAL OUTPUTTING APPARATUS, COMMUNICATION SYSTEM, SIGNAL OUTPUTTING METHOD, AND COMMUNICATION METHOD |
摘要 |
<p>The objective of the invention is to increase the signal transmission amount per unit time without increasing the clock rate and the number of signal lines. A control unit (22) causes the output impedance of an output unit (20) to match the characteristic impedance of a signal line (26) during a signal level non-transition time period. If the second bit of a signal to be processed is a first value, the control unit (22) causes the output impedance to match the characteristic impedance during a signal level transition time period as well. If the second bit is a second value, the control unit (22) causes the output impedance not to match the characteristic impedance during the signal level transition time period.</p> |
申请公布号 |
WO2013175577(A1) |
申请公布日期 |
2013.11.28 |
申请号 |
WO2012JP63084 |
申请日期 |
2012.05.22 |
申请人 |
FUJITSU LIMITED;SAKURAI, HIROSHI |
发明人 |
SAKURAI, HIROSHI |
分类号 |
H04L25/49;H03K19/0175;H04L25/02 |
主分类号 |
H04L25/49 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|