发明名称 Memory device interface methods, apparatus, and systems
摘要 Apparatus and systems for memory system are provided. In an example, a memory system can include a plurality of memory dice and an interface chip. The memory dice can include a first memory die including a memory array coupled to through wafer interconnects (TWIs) and a second memory die, wherein the first memory die is stacked over the second memory die. In an example, the interface chip can be coupled to the TWIs and configured to provide memory commands to selected memory addresses within the plurality of memory dice. In an example, the interface chip can be configured to perform DRAM sequencing.
申请公布号 US8593849(B2) 申请公布日期 2013.11.26
申请号 US201213686438 申请日期 2012.11.27
申请人 MICRON TECHNOLOGY, INC. 发明人 JEDDELOH JOE M.
分类号 G11C5/06 主分类号 G11C5/06
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