| 摘要 |
<p>In a monolithic gate driver, a power consumption is reduced as compared with a conventional one without lowering a voltage of a scanning signal to be applied to a gate bus line as compared with a conventional one. A stage constituent circuit includes first-node to third-node, a thin-film transistor (M7) that changes a potential of a scanning signal toward a VDD potential when a potential of the first-node is in a HIGH level, a thin-film transistor (M6) that changes a potential of a different stage control signal toward a potential of a clock (CKA) when a potential of the second-node is in the HIGH level, a capacitor (C1) that is disposed between the first-node and the second-node, and a capacitor (C2) that is disposed between the second-node and the third-node. The potential of the first-node is raised on the basis of a different stage control signal output from the stage constituent circuit in the different stage, and then the potential of the second-node and a potential of the third-node are sequentially raised. Herein, an amplitude of the clock is set to be smaller than an amplitude of the scanning signal.</p> |
