发明名称 MEMORY CIRCUIT
摘要 A memory circuit provided with: a bistable circuit (30) for storing data; non-volatile elements (MTJ1, MTJ2) for storing, in a non-volatile manner, data stored in the bistable circuit, and restoring, in the bistable circuit, the data that has been stored in a non-volatile manner; and a determining part (50). The data in the bistable circuit is stored by the determining part (50) in the non-volatile elements when the data in the bistable circuit and the data in the non-volatile elements do not match, and the data in the bistable circuit is not stored by the determining part (50) in the non-volatile elements when the data in the bistable circuit and the data in the non-volatile elements match.
申请公布号 WO2013172065(A1) 申请公布日期 2013.11.21
申请号 WO2013JP54051 申请日期 2013.02.19
申请人 JAPAN SCIENCE AND TECHNOLOGY AGENCY 发明人 YAMAMOTO SHUICHIRO;SHUTO YUSUKE;SUGAHARA SATOSHI
分类号 G11C11/15;G11C11/413 主分类号 G11C11/15
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