发明名称 MFENCE and LFENCE Micro-Architectural Implementation Method and System
摘要 A system and method for fencing memory accesses. Memory loads can be fenced, or all memory access can be fenced. The system receives a fencing instruction that separates memory access instructions into older accesses and newer accesses. A buffer within the memory ordering unit is allocated to the instruction. The access instructions newer than the fencing instruction are stalled. The older access instructions are gradually retired. When all older memory accesses are retired, the fencing instruction is dispatched from the buffer.
申请公布号 US2013305018(A1) 申请公布日期 2013.11.14
申请号 US201313942660 申请日期 2013.07.15
申请人 PALANCA SALVADOR;FISCHER STEPHEN;MAIYURAN SUBRAMANIAM;QAWAMI SHEKOUFEH 发明人 PALANCA SALVADOR;FISCHER STEPHEN;MAIYURAN SUBRAMANIAM;QAWAMI SHEKOUFEH
分类号 G06F9/30;G06F9/38 主分类号 G06F9/30
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