发明名称 METHODS AND APPARATUS FOR CONTROLLING HIERARCHICAL CACHE MEMORY
摘要 Methods and apparatus for controlling hierarchical cache memories permit: controlling a first level cache memory including a plurality of cache lines, each cache line being operable to store an address tag and data; controlling a next lower level cache memory including a plurality of cache lines, each cache line being operable to store an address tag, status flags, and data, the status flags of each cache line including an L-flag; and setting the L-flag of a given cache line of the next lower level cache memory to indicate whether or not a corresponding one the of the cache lines of the first level cache memory has been refilled with a copy of the data stored in the given cache line of the next lower level cache memory.
申请公布号 EP1502193(B1) 申请公布日期 2013.11.13
申请号 EP20030717727 申请日期 2003.04.25
申请人 SONY COMPUTER ENTERTAINMENT INC. 发明人 MAGOSHI, HIDETAKA
分类号 G06F12/08 主分类号 G06F12/08
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