发明名称 Double solid metal pad with reduced area
摘要 An integrated circuit structure includes a bond pad; an Mtop pad located directly underlying the bond pad; an Mtop-1 pad having at least a portion directly underlying the Mtop pad, wherein at least one of the Mtop pad and the Mtop-1 pad has a horizontal dimension smaller than a horizontal dimension of the bond pad; a plurality of vias interconnecting the Mtop pad and the Mtop-1 pad; and a bond ball on the bond pad. Each of the Mtop pad and the Mtop-1 pad has positive enclosures to the bond ball in all horizontal directions.
申请公布号 US8581423(B2) 申请公布日期 2013.11.12
申请号 US20080272501 申请日期 2008.11.17
申请人 CHEN HSIEN-WEI;LIU YU-WEN;TSAI HAO-YI;JENG SHIN-PUU;CHEN YING-JU;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 CHEN HSIEN-WEI;LIU YU-WEN;TSAI HAO-YI;JENG SHIN-PUU;CHEN YING-JU
分类号 H01L23/52;H01L23/48;H01L29/40 主分类号 H01L23/52
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