发明名称 Nanoscale electric lithography
摘要 A nanoscale lithographic method in which a reusable conductive mask, having a pattern of conductive surfaces and insulating surfaces, is positioned upon a substrate whose surface contains an electrically responsive resist layer over a buried conductive layer. When an electric field is applied between the conductive mask and buried conductive layer, the resist layer is altered in portions adjacent the conductive areas of the mask. Selective processing is performed on the surface of the substrate, after mask removal, to remove portions of the resist layer according to the pattern transferred from the mask. The substrate may be a target substrate, or the substrate may be utilized for a lithographic masking step of another substrate. In one aspect of the invention the electrodes to which the charge is applied are divided, such as into a plurality of rows and columns wherein any desired pattern may be created without the need to fabricate specific masks.
申请公布号 US8562795(B2) 申请公布日期 2013.10.22
申请号 US20080249947 申请日期 2008.10.12
申请人 CHEN YONG;THE REGENTS OF THE UNIVERSITY OF CALIFORNIA 发明人 CHEN YONG
分类号 C25D5/02;B23H3/04;B23H3/06;C25D17/12;G03F7/00 主分类号 C25D5/02
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