发明名称 Cooperative multi-level scheduler for virtual engines
摘要 A device for providing a plurality of virtual machines utilizes a multi-core processor having a plurality of cores, each with a memory cache, and a shared memory resource in communication with the cores. The device utilizes a cooperative, multi-level scheduler. The multi-level scheduler includes a primary scheduler and a plurality of secondary schedulers, each supporting a subset of the physical cores. The primary scheduler assigns a group of threads to one of the processor cores. The secondary scheduler associated with the processor core to which the group of threads was assigned schedules execution of individual ones of the threads. The secondary scheduler also provides an indication of lock status to the primary scheduler. The lock status information can be used by the primary scheduler to avoid preempting a thread that holds a lock.
申请公布号 US8566829(B1) 申请公布日期 2013.10.22
申请号 US20080022265 申请日期 2008.01.30
申请人 FORECAST JOHN;EVANS MICHAEL;EMC CORPORATION 发明人 FORECAST JOHN;EVANS MICHAEL
分类号 G06F9/46 主分类号 G06F9/46
代理机构 代理人
主权项
地址