| 摘要 |
A memory control system includes a first queue unit, a second queue unit, a first transforming unit, a second transforming unit, an arbiter and a control unit. The first queue unit temporarily stores multiple first request instructions. The second queue unit temporarily stores multiple second request instructions. The first transforming unit selectively re-assigns memory addresses corresponding to these first request instructions. The second transforming unit selectively re-assigns memory addresses corresponding to these second request instructions. The arbiter performs immediate scheduling of the one or more first request instructions and the one or more second request instructions to the memory. The control unit compares bandwidths of the one or more first request instructions with bandwidths of the one or more second request instructions, and controls the first transforming unit and the second transforming unit to perform re-assigning operations or not according to compared results.
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