发明名称 BUFFER CIRCUIT AND METHOD FOR DRIVING BUFFER CIRCUIT
摘要 Provided is a method for driving buffer circuit (20), the circuit being provided with: an output terminal (26); a first transistor (21) that is connected to a signal source (23) of a clock signal including a first voltage and a second voltage lower than the first voltage, and that supplies the first voltage to the output terminal (26); and a second transistor (22) that is connected to a voltage source (27) of a third voltage lower than the first voltage, and that presents the third voltage to the output terminal (26). During the interval (C) in which the clock signal is at the first voltage, the first transistor is placed in the conducting state. Following the first voltage interval (C), the first transistor (21) and the second transistor (22) are placed in the conducting state during the interval in which the clock signal is at the second voltage.
申请公布号 WO2013153576(A1) 申请公布日期 2013.10.17
申请号 WO2012JP02487 申请日期 2012.04.10
申请人 PANASONIC CORPORATION;TSUGE, HITOSHI;MATSUI, MASAFUMI 发明人 TSUGE, HITOSHI;MATSUI, MASAFUMI
分类号 H03K19/0175 主分类号 H03K19/0175
代理机构 代理人
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