发明名称 Resistance random access memory including variable-resistance layers
摘要 According to one embodiment, there are provided a first electrode, a second electrode, first and second variable-resistance layers that are arranged between the first electrode and the second electrode, and at least one non variable-resistance layer that is arranged so that positions of the first and second variable-resistance layers between the first electrode and the second electrode are symmetrical to each other.
申请公布号 US8558208(B2) 申请公布日期 2013.10.15
申请号 US201113097375 申请日期 2011.04.29
申请人 FUJITSUKA RYOTA;KIYOTOSHI MASAHIRO;SEKINE KATSUYUKI;SATO MITSURU;KABUSHIKI KAISHA TOSHIBA 发明人 FUJITSUKA RYOTA;KIYOTOSHI MASAHIRO;SEKINE KATSUYUKI;SATO MITSURU
分类号 H01L29/02 主分类号 H01L29/02
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